| 摘要 |
<p>Provided in the present invention is an MOSFET manufacturing method comprising: a. providing a substrate, a drain region, a dummy gate stack layer, an interlayer dielectric layer, and a sidewall; b. removing the dummy gate stack layer to form a dummy gate gap and forming an oxide layer on the substrate in the dummy gate gap; c. covering a photoresist at a side of a drain end of the semiconductor structure and exposing the oxide layer in proximity to a source end in the dummy gate gap; d. anisotropic etching the substrate and the oxide layer that are not covered by the photoresist, thus forming a gap; e. removing the photoresist and depositing a transition barrier layer in the gap until the transition barrier layer is in flush with the oxide layer; f. etching the semiconductor structure and removing the oxide layer to expose a groove surface; and, g. depositing a gate electrode stack layer in the dummy gate gap. Per the method provided in the present invention, hot-carrier effect is effectively suppressed while component performance is optimized.</p> |
