发明名称 |
Pixeltaktsignalgenerator, digitaler Fernseher mit demselben und Verfahren zur Erzeugung des Pixeltaktsignals |
摘要 |
<p>A pixel clock generator is provided. The pixel clock generator includes a phase-locked-loop (PLL) circuit that generates, from an oscillation signal having a first frequency of tens of MHz, a multi-phase oscillation signal having a second frequency of several GHz; and a frequency/phase adjusting circuit that synchronizes the multi-phase oscillation signal with a horizontal sync signal to generate a first oscillation signal, frequency-divides the first oscillation signal to generate a second oscillation signal, and adjusts a phase of the second oscillation signal to generate the pixel clock.</p> |
申请公布号 |
DE102014111225(A8) |
申请公布日期 |
2015.04.23 |
申请号 |
DE201410111225 |
申请日期 |
2014.08.07 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHOO, KANG-YEOP;KIM, DO-HYUNG;KIM, TAE-IK;MOON, JONG-BIN;JUNG, SANG-DON |
分类号 |
H04N5/06 |
主分类号 |
H04N5/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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