发明名称 Processes and structures for IC fabrication
摘要 The present invention discloses methods and apparatuses for the separations of IC fabrication and assembling of separated IC components to form complete IC structures. In an embodiment, the present fabrication separation of an IC structure into multiple discrete components can take advantages of dedicated IC fabrication facilities and achieve more cost effective products. In another embodiment, the present chip assembling provides high density interconnect wires between bond pads, enabling cost-effective assembling of small chip components. In an aspect, the present process provides multiple interconnect wires in the form of a ribbon between the bond pads, and then subsequently separates the ribbon into multiple individual interconnect wires.
申请公布号 US2015111376(A1) 申请公布日期 2015.04.23
申请号 US201414586939 申请日期 2014.12.30
申请人 TEREPAC CORPORATION 发明人 Sheats Jayna
分类号 H01L21/768 主分类号 H01L21/768
代理机构 代理人
主权项 1. A method for interconnecting bond pads between integrated components, the method comprising: positioning a sheet of conductive material across two or more adjacent bond pads of an integrated component, wherein the sheet of conductive material is configured to electrically connect the two or more adjacent bond pads; separating, between the two or more adjacent bond pads, the sheet of conductive material into multiple interconnect wires, wherein at least one interconnect wire of the multiple interconnect wires is disposed on a bond pad of the two or more adjacent bond pads.
地址 Waterloo CA