发明名称 ADJUSTABLE DELAY CALIBRATION IN A CRITICAL PATH MONITOR
摘要 A critical path monitor (CPM) having a set of split paths is configured in an integrated circuit (IC) that includes a corresponding set of critical paths. A first and a second split path is configured with a first and a second simulated delay sections and fine delay sections, respectively. A delay of each of the first and second fine delay sections is adjustable in several steps. The delay of the first fine delay section is adjustable differently from the delay of the second fine delay section in response to a common operating condition change. Differently adjusting the delays of the first and the second fine delay sections causes an edge of a pulse to be synchronized between a first edge detector located after the first simulated delay section and a second edge detector located after the second simulated delay section.
申请公布号 US2015109043(A1) 申请公布日期 2015.04.23
申请号 US201314058428 申请日期 2013.10.21
申请人 International Business Machines Corporation 发明人 Drake Alan James;Floyd Michael Stephen;Owczarczyk Pawel;Still Gregory Scott;Tiner Marshall Dale;Yuan Xiaobin
分类号 H03K5/159 主分类号 H03K5/159
代理机构 代理人
主权项 1. A method for adjustable delay calibration in a critical path monitor (CPM), the method comprising: configuring, in an integrated circuit (IC), the CPM, wherein the IC includes a set of critical paths, wherein the CPM includes a set of split paths, a split path in the set of split paths corresponding to a critical path in the set of critical paths; configuring, in a first split path in the set of split paths, a first simulated delay section and a first fine delay section; configuring, in a second split path in the set of split paths, a second simulated delay section and a second fine delay section; configuring the first fine delay section such that a delay of the first fine delay section is adjustable in several steps; and configuring the second fine delay section such that a delay of the second fine delay section is adjustable in several steps, wherein the delay of the first fine delay section is adjustable differently from the delay of the second fine delay section in response to a common operating condition change, and wherein differently adjusting the delay of the first fine delay section and the delay of the second fine delay section causes an edge of a pulse to be synchronized between a first edge detector located after the first simulated delay section and a second edge detector located after the second simulated delay section.
地址 Armonk NY US