发明名称 ELECTRONIC CIRCUIT HAVING SERIAL LATCH SCAN CHAINS
摘要 The invention relates to an electronic circuit (10) having one or more latch scan chains (12), the electronic circuit (10) comprising (i) a built-in test structure (14); (ii) generation means (16) for simultaneously generating scan-in data for each of said scan chains (12); (iii) interception means (18) for simultaneously intercepting test lines (20) of said scan chains (12), said test lines (20) comprising scan-in lines (22) and/or control lines (24). Said interception means (18) are responsive to said generation means (16) in order to simultaneously feed the generated scan-in data into each of said scan chains (12) for initializing the electronic circuit (10). The invention further relates to a method for initializing an electronic circuit (10), as well as a data processing system (210) for initializing an electronic circuit (10).
申请公布号 US2015113346(A1) 申请公布日期 2015.04.23
申请号 US201414520115 申请日期 2014.10.21
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GLOEKLER TILMAN;KOENIG ANDREAS;KUENZER JENS;LICHTENAU CEDRIC
分类号 G01R31/3177;G01R31/317 主分类号 G01R31/3177
代理机构 代理人
主权项 1. An electronic circuit coupled to one or more latch scan chains, the electronic circuit comprising: a built-in test structure; a data circuit that provides scan-in data in parallel for each of the one or more latch scan chains; an interception circuit that intercepts test lines of the one or more latch scan chains simultaneously, wherein the test lines include at least one of a set including scan-in lines and control lines, and wherein the data generator circuit, responsive to a signal of the interception circuit, simultaneously feeds the scan-in data into each of the one or more latch scan chains to initialize the electronic circuit.
地址 ARMONK NY US
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