发明名称 DATA-CONTROLLED AUXILIARY BRANCHES FOR SRAM CELL
摘要 A circuit includes a first inverter, a second inverter, a first auxiliary branch and a second auxiliary branch. The first and second inverters are cross-coupled to form a first storage node and a second storage node. The first auxiliary branch is coupled to the first storage node and configured to assist the first inverter in holding data based on data stored at the second storage node during a read operation, and assist the first inverter in flipping data based on data to be written to the first storage node during a write operation. The second auxiliary branch is coupled to the second storage node and configured to assist the second inverter in holding data based on data stored in the first storage node during the read operation, and assist the second inverter in flipping data based on data to be written to the second storage node during the write operation.
申请公布号 US2015109852(A1) 申请公布日期 2015.04.23
申请号 US201314059022 申请日期 2013.10.21
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 YANG CHEN-LIN;TSAI MING-CHIEN;WU CHUNG-YI;LEE CHENG HUNG
分类号 G11C11/419;G11C7/14 主分类号 G11C11/419
代理机构 代理人
主权项 1. A circuit comprising: a first inverter; a second inverter cross-coupled with the first inverter to form a first storage node and a second storage node; a first auxiliary branch coupled to the first storage node and configured to assist the first inverter in holding data based on data stored at the second storage node during a read operation, and assist the first inverter in flipping data based on data to be written to the first storage node during a write operation; and a second auxiliary branch coupled to the second storage node and configured to assist the second inverter in holding data based on data stored at the first storage node during the read operation, and assist the second inverter in flipping data based on data to be written to the second storage node during the write operation.
地址 HSINCHU TW