发明名称 半導体デバイスの絶縁
摘要 <p>Methods of forming and structures for isolation structures for semiconductor devices are disclosed. The isolation structures are wider at the bottom than at the top, providing the ability to further scale the size of semiconductor devices. A first etch process is used to form a first trench portion, and a second etch process or an oxidation process is used to form a second trench portion beneath the first trench portion. The second trench portion is wider than the first trench portion. A liner may form during the first trench portion on the sidewalls of the first trench portion that protects the first trench portion sidewalls during the second etch process, in one embodiment. Alternatively, a liner may be deposited on the sidewalls of the first trench portion, in another embodiment.</p>
申请公布号 JP5707098(B2) 申请公布日期 2015.04.22
申请号 JP20100246006 申请日期 2010.11.02
申请人 发明人
分类号 H01L21/76;H01L27/08 主分类号 H01L21/76
代理机构 代理人
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