发明名称 A METHOD TO REDUCE CONTACT RESISTANCE OF N-CHANNEL TRANSISTORS BY USING A III-V SEMICONDUCTOR INTERLAYER IN SOURCE AND DRAIN
摘要 A method to reduce contact resistance of n-channel transistors by using a III-V semiconductor interlayer in source and drain is generally presented. In this regard, a device is introduced comprising an n-type transistor with a source region and a drain region a first interlayer dielectric layer adjacent the transistor, a trench through the first interlayer dielectric layer to the source region, and a conductive source contact in the trench, the source contact being separated from the source region by a III-V semiconductor interlayer. Other embodiments are also disclosed and claimed.
申请公布号 EP2659514(A4) 申请公布日期 2015.04.22
申请号 EP20110854145 申请日期 2011.12.20
申请人 INTEL CORPORATION 发明人 MUKHERJEE, NILOY;DEWEY, GILBERT;RADOSAVLJEVIC, MARKO;CHAU, ROBERT S.;METZ, MATTHEW V.
分类号 H01L29/78;H01L21/285;H01L21/336;H01L29/66 主分类号 H01L29/78
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