发明名称 3次元構造のメモリ素子を製造する方法
摘要 A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiCl2H2) to the substrate.
申请公布号 JP5705990(B2) 申请公布日期 2015.04.22
申请号 JP20130531511 申请日期 2011.10.06
申请人 发明人
分类号 H01L21/336;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/336
代理机构 代理人
主权项
地址