| 摘要 |
<p>The present invention relates to a semiconductor device and a semiconductor system including the same and, especially, to a technique which can reduce parity bit storage space of a semiconductor device. The present invention comprises a memory outputting parity bit through data mask signal delivery path while reading, and receiving data mask signal through the data mask signal delivery path while writing; and a system on chip detecting error by decoding the parity bit while reading, and outputting the data mask signal to the memory while writing.</p> |
