发明名称 Apparatus, systems and methods for power supply employing single-stage forward voltage conversion
摘要 A method of supplying direct-current (DC) power is presented herein. In the method, a first electrical signal and a second electrical signal are received. The first electrical signal alternates between a high voltage and a low voltage according to a constant duty cycle. The second electrical signal is synchronized with the first electrical signal. The first electrical signal is gated using the second electrical signal to produce a gated electrical signal with a duty cycle less than the duty cycle of the first electrical signal. The gated electrical signal is filtered to generate a DC output voltage. A difference between the generated DC output voltage and a reference DC voltage is determined. The duty cycle of the gated electrical signal is controlled by controlling the gating of the first electrical signal based on the difference.
申请公布号 US9013896(B2) 申请公布日期 2015.04.21
申请号 US201113333488 申请日期 2011.12.21
申请人 EchoStar Technologies L.L.C. 发明人 Thomas Jose Palathra;Chaisitti Sam;Rele Priyanka Rajan;Lugo Nevarez Jorge Enrique
分类号 H02M3/335;H02M1/00 主分类号 H02M3/335
代理机构 Lowe Graham Jones PLLC 代理人 Lowe Graham Jones PLLC
主权项 1. A method of supplying direct-current (DC) power, the method comprising: receiving a first electrical signal at a gating circuit from a secondary winding of a transformer, wherein the gating circuit comprises: a first gated transistor that has a drain and an output, wherein the drain of the first gated transistor is coupled to a first terminal of the secondary winding of the transformer, andwherein the first, gated transistor is gated using a first control signal:a second gated transistor that has a drain and an output, wherein the drain of the second gated transistor is coupled the output of the first gated transistor, andwherein the second gated transistor is gated using a second control signal, wherein the second control signal is complementary to the first control signal such that the second gated transistor is not gated while the first gated transistor is gated and such that the second gated transistor is gated while the first gated transistor is not gated; anda third gated transistor that has a drain and an output, wherein the drain of the third gated transistor is coupled to the output of the second gated transistor and the output of the third gated transistor is coupled to a second terminal of the secondary winding of the transformer, andwherein the third gated transistor is gated using a third control signal,wherein the first electrical signal is defined by a leading edge and alternates between a high voltage and a low voltage according to a constant duty cycle; receiving a second electrical signal synchronized with the first electrical signal, wherein the second electrical signal is received at a controller that generates the first control signal, the second control signal, and the third control signal,wherein the second electrical signal is received from a pulse transformer,wherein the pulse transformer outputs the second electrical signal based on a primary control signal received from a square wave generator control circuit such that a leading edge of the second electrical signal corresponds to the leading edge of the primary control signal,wherein the primary control signal turns on and turns off a switch connected between a terminal of a primary winding of the transformer and a ground reference such that the leading edge of the first electrical signal corresponds to the leading edge of the second electrical signal, and such that the constant duty cycle of the first electrical signal corresponds to a duty cycle of the second electrical signal; gating the third gated transistor using the third control signal, wherein a leading edge of the third control signal occurs when a leading edge of the second electrical signal occurs, andwherein a duty cycle of the third control signal is the same as the constant duty cycle of the first electrical signal; gating the first gated transistor using the first control signal so that the first electrical signal is gated to produce a gated electrical signal with a duty cycle less than the duty cycle of the first electrical signal; filtering the gated electrical signal output from the first gated transistor to generate a DC output voltage; determining a difference between the generated DC output voltage and a reference DC voltage; and controlling the duty cycle of the gated electrical signal by controlling the gating of the first electrical signal based on the difference.
地址 Englewood CO US
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