发明名称 |
Semiconductor device |
摘要 |
A semiconductor device of an embodiment includes: an n-type first SiC epitaxial layer; a p-type second SiC epitaxial layer on the first SiC epitaxial layer containing a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming a combination of Al, Ga, or In and N, and/or a combination of B and P, the ratio of the concentration of the element D to the element A being higher than 0.33 but lower than 1.0; a surface region at the surface of the second SiC epitaxial layer containing the element A at a lower concentration than in the second SiC epitaxial layer, the ratio being higher than in the second SiC epitaxial layer; n-type first and second SiC regions; a gate insulating film; a gate electrode; a first electrode; and a second electrode. |
申请公布号 |
US9012923(B2) |
申请公布日期 |
2015.04.21 |
申请号 |
US201414448345 |
申请日期 |
2014.07.31 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Nishio Johji;Shimizu Tatsuo;Iijima Ryosuke;Ota Chiharu;Shinohe Takashi |
分类号 |
H01L29/15;H01L29/36;H01L29/16;H01L29/167;H01L29/78 |
主分类号 |
H01L29/15 |
代理机构 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A semiconductor device comprising:
an n-type first SiC epitaxial layer; a p-type second SiC epitaxial layer provided on the first SiC epitaxial layer, the p-type second SiC epitaxial layer containing a p-type impurity and an n-type impurity, the p-type impurity being an element A, the n-type impurity being an element D, the element A and the element D forming at least one of a first combination or a second combination, the first combination being a combination of the element A selected from a group consisting of Al (aluminum), Ga (gallium), and In (indium) and the element D being N (nitrogen), the second combination being a combination of the element A being B (boron) and the element D being P (phosphorus), a ratio of a concentration of the element D to a concentration of the element A in the at least one of the combinations being higher than 0.33 but lower than 1.0; a surface region provided at a surface of the p-type second SiC epitaxial layer, the surface region containing the element A at a lower concentration than the concentration of the element A in the p-type second SiC epitaxial layer, a ratio of a concentration of the element D to the concentration of the element A in the at least one of the combinations being higher than the ratio in the p-type second SiC epitaxial layer; an n-type first SiC region provided at the surface of the p-type second SiC epitaxial layer, the n-type first SiC region having a depth equal to or greater than a thickness of the p-type second SiC epitaxial layer; an n-type second SiC region provided at the surface of the p-type second SiC epitaxial layer, the n-type second SiC region being separated from the n-type first SiC region, the n-type second SiC region having a depth smaller than the thickness of the p-type second SiC epitaxial layer; a gate insulating film provided on the surface region; a gate electrode provided on the gate insulating film; a first electrode provided on the n-type second SiC region; and a second electrode provided on the opposite side of the n-type first SiC epitaxial layer from the first electrode. |
地址 |
Minato-ku JP |