发明名称 Integrated circuit (IC) chip having both metal and silicon gate field effect transistors (FETs) and method of manufacture
摘要 Field Effect Transistors (FETs), Integrated Circuit (IC) chips including the FETs, and a method of forming the FETs on ICs. FET locations are defined on a layered semiconductor wafer, preferably a Silicon On Insulator (SOI) wafer. One or more FET locations are defined as silicon gate locations and remaining as Replacement Metal Gate (RMG) FET locations with at least one of each on the IC. Polysilicon gates are formed in all FET locations. Gates in silicon gate locations are tailored, e.g., doped and silicided. Remaining polysilicon gates are replaced with metal in RMG FET locations. FETs are connected together into circuits with RMG FETs being connected to silicon gate FETs.
申请公布号 US9012283(B2) 申请公布日期 2015.04.21
申请号 US201113108213 申请日期 2011.05.16
申请人 International Business Machines Corporation 发明人 Kanike Narasimhulu
分类号 H01L21/8234;H01L27/12;H01L21/84;H01L27/092;H01L27/06;H01L21/8238 主分类号 H01L21/8234
代理机构 Law Office of Charles W. Peterson, Jr. 代理人 Law Office of Charles W. Peterson, Jr. ;Schnurmann H. Daniel
主权项 1. A method of forming Field Effect Transistors (FETs), said method comprising: defining FET locations on a layered semiconductor wafer, said layered semiconductor wafer having semiconductor gate dielectric formed on a surface semiconductor layer, semiconductor gates being formed in all FET locations; identifying semiconductor gate locations, at least one FET location being identified as a semiconductor gate location, remaining FET locations being metal gate locations, a plurality of said FET locations being first type FET locations with said semiconductor gate dielectric having a selected thickness, said plurality of said FET locations including at least one metal gate location and at least one semiconductor gate location; replacing semiconductor gates with metal in said metal gate locations, wherein at least one semiconductor gate FET of said first type has a lower threshold than metal gate FETs of said first type, the metal gate work function being 100 millivolts (100 mV) or more from the band edge of said surface semiconductor layer, said lower threshold voltage (VT) being 100 mV lower in magnitude than metal gate FET VTs of the same device type; and connecting FETs together, metal gate FETs being connected to semiconductor gate FETs.
地址 Armonk NY US