Nanowire transistor devices and forming techniques

摘要

Techniques are disclosed for customization of nanowire transistor devices to provide a diverse range of channel configurations and/or material systems within the same integrated circuit die. In accordance with one example embodiment, sacrificial fins are removed and replaced with custom material stacks of arbitrary composition and strain suitable for a given application. In one such case, each of a first set of the sacrificial fins is recessed or otherwise removed and replaced with a p-type layer stack, and each of a second set of the sacrificial fins is recessed or otherwise removed and replaced with an n-type layer stack. The p-type layer stack can be completely independent of the process for the n-type layer stack, and vice-versa. Numerous other circuit configurations and device variations are enabled using the techniques provided herein.

主权项

1. A method for forming a nanowire transistor structure, the method comprising:
forming a plurality of fins on a substrate, each fin extending from the substrate; forming a shallow trench isolation on opposing sides of each fin; masking a first set of the fins so as to leave a first set of unmasked sacrificial fins; recessing the first set of unmasked sacrificial fins to provide a first set of recesses; forming a multilayer stack of a first type in each recess of the first set of recesses, each multilayer stack of the first type comprising first and second material layers, wherein the first material layer is in a first horizontal plane and the second material layer will be formed into a channel nanowire of the transistor structure; masking each of the multilayer stacks of the first type so as to leave a second set of unmasked sacrificial fins; recessing the second set of unmasked sacrificial fins to provide a second set of recesses; and forming a multilayer stack of a second type in each recess of the second set of recesses, each multilayer stack of the second type comprising first and second material layers, wherein the first material layer is in the first horizontal plane and the second material layer will be formed into a channel nanowire of the transistor structure, wherein the first material layer of the multilayer stacks of the first type is configured with a different thickness than the first material layer of the multilayer stacks of the second type.