发明名称 Sampling clock synchronizing apparatus, digital coherent receiving apparatus, and sampling clock synchronizing method
摘要 In a sampling clock synchronizing apparatus, an A/D converter converts an analog signal to a digital signal based on a sampling clock, and a processor compensates a band limitation due to spectral narrowing by filter characteristics of characteristics opposite to those of the spectral narrowing with respect to a signal produced from the A/D converter subjected to the spectral narrowing, and detects a phase shift in the sampling clock based on a signal after the compensation of the spectral narrowing and synchronizes sampling timing.
申请公布号 US9014575(B2) 申请公布日期 2015.04.21
申请号 US201213345008 申请日期 2012.01.06
申请人 Fujitsu Limited 发明人 Nakashima Hisao;Hoshida Takeshi
分类号 H04B10/06;H04L7/027;H04L7/033 主分类号 H04B10/06
代理机构 Fujitsu Patent Center 代理人 Fujitsu Patent Center
主权项 1. A digital coherent receiving apparatus comprising: an optical hybrid circuit which mixes a reception optical signal with local oscillation light and outputs electric field information of the reception optical signal; an optical/electrical converter which converts the electric field information into an electrical analog signal; an A/D converter which converts the electrical analog signal into a digital signal based on a sampling clock; and a processor which detects a phase shift in the sampling clock and synchronizes sampling timing, performs filter control for suppressing reduction in detection sensitivity of phase shift in the sampling clock with respect to the digital signal produced from the A/D converter subjected to spectral narrowing, and performs reception data detection.
地址 Kawasaki JP