| 发明名称 | Resistance memory device | ||
| 摘要 | Provided is a resistance memory device including a dielectric layer, a conductive layer, a bottom electrode, a top electrode and a variable resistance layer. The dielectric layer is disposed on a substrate and has a first opening constituted by a lower opening and an upper opening. The conductive layer fills up the lower opening. The bottom electrode is disposed on the bottom and on at least a portion of the sidewall of the upper opening. The top electrode is disposed in the upper opening. The variable resistance layer is disposed between the top electrode and the bottom electrode. | ||
| 申请公布号 | US9012880(B2) | 申请公布日期 | 2015.04.21 |
| 申请号 | US201313773612 | 申请日期 | 2013.02.21 |
| 申请人 | Winbond Electronics Corp. | 发明人 | Jang Wen-Yueh;Chiang Ming-Chung |
| 分类号 | H01L45/00 | 主分类号 | H01L45/00 |
| 代理机构 | Jianq Chyun IP Office | 代理人 | Jianq Chyun IP Office |
| 主权项 | 1. A resistance memory device, comprising: a dielectric layer, disposed on a substrate and has a first opening constituted by a lower opening and an upper opening; a conductive layer, filling up the lower opening; a bottom electrode, disposed on a bottom and on at least a portion of a sidewall of the upper opening; a top electrode, disposed in the upper opening without contacting the sidewall of the upper opening; and a variable resistance layer, disposed between the bottom electrode and the top electrode, wherein the bottom electrode exposes a top portion of the sidewall of the upper opening, and the variable resistance layer covers the exposed top portion of the sidewall of the upper opening. | ||
| 地址 | Taichung TW | ||