发明名称 Controlling CD and CD uniformity with trim time and temperature on a wafer by wafer basis
摘要 Exemplary embodiments are directed to controlling CD uniformity of a wafer by controlling trim time on temperature in a plasma processing system. The plasma processing system has a wafer support assembly including a plurality of independently controllable temperature control zones across a chuck and a controller that controls each temperature control zone. The controller receives process control and temperature data associated with at least one wafer previously processed in a plasma chamber of the plasma processing system. The controller also receives critical device parameters of a current wafer to be processed in the plasma chamber. The controller calculates a target trim time and a target temperature profile of the current wafer based on the process control and temperature data of the at least one previously processed wafers and the critical device parameters of the current wafer. The current wafer as subjected to a trimming operation for a duration of the target trim time while controlling temperatures in the temperature control zones to thereby control temperature of each device die location based on the target temperature profile.
申请公布号 US9012243(B2) 申请公布日期 2015.04.21
申请号 US201414470544 申请日期 2014.08.27
申请人 Lam Research Corporation 发明人 Kimura Yoshie;Kamp Tom;Pape Eric;DeshPande Rohit;Gaff Keith;Kamarthy Gowri
分类号 H01L21/66;H01L21/67;H01J37/32 主分类号 H01L21/66
代理机构 Buchanan Ingersoll & Rooney PC 代理人 Buchanan Ingersoll & Rooney PC
主权项 1. A system for controlling CD uniformity of a wafer in a plasma processing system, comprising: a wafer support assembly, including a plurality of independently controllable temperature control zones arranged in proximity to device die locations above the temperature control zones; and a controller configured to: receive critical device parameters of an incoming wafer and process recipe parameters over a network;calculate a target trim time and a target temperature profile of the incoming wafer based on the process control and temperature data of the at least one previously processed wafer and the critical device parameters of the incoming wafer; andadjust the temperature of each device die location for a duration of the target trim time based on the calculated target temperature profile.
地址 Fremont CA US