Methods for patterning microelectronic devices using two sacrificial layers

摘要

A lower layer of a microelectronic device may be patterned by forming a first sacrificial layer on the lower layer; patterning a plurality of spaced apart trenches in the first sacrificial layer; forming a second sacrificial layer in the plurality of spaced apart trenches; patterning the second sacrificial layer in the plurality of spaced apart trenches to define upper openings in the plurality of spaced apart trenches; and patterning the lower layer using the first and second sacrificial layers as a mask to form lower openings in the lower layer.

主权项

1. A method of patterning a lower layer of a microelectronic device, the method comprising:
forming a first sacrificial layer on the lower layer; patterning the first sacrificial layer to form a plurality of spaced apart trenches, the plurality of spaced apart trenches extending along a first direction; forming a second sacrificial layer in the plurality of spaced apart trenches; defining upper openings in the plurality of spaced apart trenches by patterning the second sacrificial layer to form second sacrificial patterns in the plurality of spaced apart trenches, the second sacrificial patterns spaced apart from each other in the first direction; and patterning the lower layer using the first and second sacrificial layers as a mask to form lower openings in the lower layer, wherein the first and second sacrificial layers cross one another.