Implementing DRAM failure scenarios mitigation by using buffer techniques delaying usage of RAS features in computer systems

摘要

A method, system and computer program product are provided for implementing dynamic random access memory (DRAM) failure scenarios mitigation using buffer techniques delaying usage of RAS features in computer systems. A buffer is provided with a memory controller. Physical address data read/write failures are analyzed. Responsive to identifying predefined failure types for physical address data read/write failures, the buffer is used to selectively store and retrieve data.

主权项

1. A method for implementing dynamic random access memory (DRAM) failure scenarios mitigation using buffer techniques in a computer system comprising:
providing a buffer with a memory controller; analyzing address range of identified physical address data read/write failures; identifying predefined failure types for the identified physical address data read/write failures, providing range analysis logic for implementing failure analysis, said range analysis logic effectively determines the failure types and provides buffer control to empty the buffer; and using the buffer to selectively store and retrieve data, responsive to identified predefined failure types.