发明名称 Generic bus de-multiplexer/port expander with inherent bus signals as selectors
摘要 A circuit comprising: a device determiner configured to, in a first mode of operation, receive a device selection signal via at least one of: at least one control line and at least one signal line; and a device router configured to, in a second mode of operation, route signals between the at least one of: at least one control line and at least one signal line and at least one device dependent on the device selection signal.
申请公布号 US9014182(B2) 申请公布日期 2015.04.21
申请号 US201314101009 申请日期 2013.12.09
申请人 STMicroelectronics International N.V. 发明人 Mathur Gaurav;Damle Pratik
分类号 H04L12/50;G06F13/42;G06F13/38 主分类号 H04L12/50
代理机构 Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A. 代理人 Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
主权项 1. A circuit comprising: a plurality of lines; a controller coupled to said plurality of lines and configured to receive a device selection signal via at least one line from said plurality of lines; and a router circuit coupled to said plurality of lines and configured to route signals between the plurality of lines, and at least one device, the routing being based upon the device selection signal, the controller comprising a counter configured to receive a first clock signal as a reset input, and a second clock signal via at least one other line from said plurality thereof, anda decoder configured to receive an output from the counter and generate a latch activation signal when a threshold number of second clock signal cycles is reached.
地址 Amsterdam NL