| 发明名称 | Nonvolatile semiconductor memory device | ||
| 摘要 | A nonvolatile semiconductor memory device comprises a memory cell array, a staircase voltage generator, and a decode and level shift circuit. The memory cell array comprises a plurality of memory cells and a plurality of bit lines coupled to the plurality of memory cells. The staircase voltage generator generates a staircase voltage having a staircase waveform that varies in at least two steps. The decode and level shift circuit selects one of said plurality of bit lines and applies the staircase voltage as a program voltage to the selected bit line. | ||
| 申请公布号 | US9013925(B2) | 申请公布日期 | 2015.04.21 |
| 申请号 | US201313947196 | 申请日期 | 2013.07.22 |
| 申请人 | Elite Semiconductor Memory Technology Inc. | 发明人 | Tsai Cheng-Hung |
| 分类号 | G11C16/06;G11C16/24;G11C16/30;G11C16/00;G11C16/12 | 主分类号 | G11C16/06 |
| 代理机构 | Bacon & Thomas PLLC | 代理人 | Marquez Juan Carlos A.;Bacon & Thomas PLLC |
| 主权项 | 1. A nonvolatile semiconductor memory device comprising: a memory cell array comprising a plurality of memory cells and a plurality of bit lines coupled to the plurality of memory cells; a staircase voltage generator for generating a staircase voltage having a staircase waveform that varies in at least two steps; and a decode and level shift circuit for selecting one of said plurality of bit lines and applying the staircase voltage as a program voltage to the selected bit line. | ||
| 地址 | Hsinchu TW | ||