发明名称 Multi-processor computing system having fast processor response to cache agent request capacity limit warning
摘要 An apparatus is described that includes a plurality of processors, a plurality of cache slices and respective cache agents. Each of the cache agents have a buffer to store requests from the processors. The apparatus also includes a network between the processors and the cache slices to carry traffic of transactions that invoke the processors and/or said cache agents. The apparatus also includes communication resources between the processors and the cache agents reserved to transport one or more warnings from one or more of the cache agents to the processors that the one or more cache agents' respective buffers have reached a storage capacity threshold.
申请公布号 US9015415(B2) 申请公布日期 2015.04.21
申请号 US201012890434 申请日期 2010.09.24
申请人 Intel Corporation 发明人 Varma Ankush;Moga Adrian C.;Cheng Liqun
分类号 G06F12/00;G06F12/08 主分类号 G06F12/00
代理机构 Blakely, Sokoloff, Taylor & Zafman LLP 代理人 Blakely, Sokoloff, Taylor & Zafman LLP
主权项 1. An apparatus comprising: a plurality of processors; a plurality of cache slices and respective cache agents, each of said cache agents having a buffer to store requests from said processors; a network between said processors and said cache slices to carry traffic of transactions that invoke said processors and said cache agents; and communication resources between said processors and said cache agents reserved to transport one or more warnings from one or more of said cache agents to said processors that said one or more cache agents' respective buffers have reached a storage capacity threshold, wherein each of said processors has an interface coupled to said communication resources, said interface having electronic circuitry to reduce issuance of un-credited traffic by its respective processor in response to reception of said one or more warnings.
地址 Santa Clara CA US