Semiconductor device, printing apparatus, and manufacturing method thereof

摘要

A manufacturing method of a semiconductor device including a DMOS transistor, an NMOS transistor and a PMOS transistor arranged on a semiconductor substrate, the DMOS transistor including a first impurity region and a second impurity region formed to be adjacent to each other, the first impurity region being of the same conductivity type as a drain region and a source region of the DMOS transistor, forming to enclose the drain region, and the second impurity region being of a conductivity type opposite to the first impurity region, forming to enclose the source region, the manufacturing method of the semiconductor device comprising forming the first impurity region and one of the NMOS transistor and the PMOS transistor, and forming the second impurity region and the other of the NMOS transistor and the PMOS transistor.

主权项

1. A semiconductor device comprising:
a DMOS transistor, an NMOS transistor, and a PMOS transistor arranged on a semiconductor substrate, wherein the DMOS transistor includes a drain region, a source region, a first impurity region formed in the semiconductor substrate to enclose the drain region, a second impurity region formed in the semiconductor substrate to enclose the source region, an insulation portion arranged on the semiconductor substrate between the source region and the drain region, and a gate electrode arranged on the insulation portion, wherein the first impurity region and the second impurity region are formed to be adjacent to each other in an upper surface of the semiconductor substrate, wherein the first impurity region includes a first portion and a second portion both arranged between the second impurity region and the drain region, the second portion being arranged between the first portion of the first impurity region and the drain region, wherein the insulation portion includes a first insulation portion and a second insulation portion, wherein the first insulation portion is formed on a part of the second impurity region and on the first portion of the first impurity region, wherein the second insulation portion is formed on the second portion of the first impurity region and is thicker than the first insulation portion, wherein the first impurity region has the same depth and same impurity concentration as a first well in which one of the NMOS transistor and the PMOS transistor is formed, wherein the second impurity region has the same depth and same impurity concentration as a second well of in which the other of the NMOS transistor and the PMOS transistor is formed, and wherein the first insulation portion has the same thickness as a gate insulating film of each of the NMOS transistor and the PMOS transistor.