发明名称 |
Capacitor using middle of line (MOL) conductive layers |
摘要 |
A method for fabricating a metal-insulator-metal (MIM) capacito includes depositing a first middle of line (MOL) conductive layer over a shallow trench isolation (STI) region of a semiconductor substrate. The first MOL conductive layer provides a first plate of the MIM capacitor as well as a first set of local interconnects to source and drain regions of a semiconductor device. The method also includes depositing an insulator layer on the first MOL conductive layer as a dielectric layer of the MIM capacitor. The method further includes depositing a second MOL conductive layer on the insulator layer as a second plate of the MIM capacitor. |
申请公布号 |
US9012966(B2) |
申请公布日期 |
2015.04.21 |
申请号 |
US201213684059 |
申请日期 |
2012.11.21 |
申请人 |
QUALCOMM Incorporated |
发明人 |
Chidambaram PR;Yang Bin |
分类号 |
H01L27/108;H01L29/94;H01L49/02;H01L23/522;H01L27/06 |
主分类号 |
H01L27/108 |
代理机构 |
|
代理人 |
Min Donald D. |
主权项 |
1. A device, comprising:
a semiconductor substrate; a first middle of line (MOL) conductive layer, comprising a first capacitor plate on the semiconductor substrate and covering at least a portion of a shallow trench isolation region in the semiconductor substrate; an insulator layer including a first portion on the first capacitor plate and a second portion on a first surface of each of a first set of local conductive interconnects to source and drain regions of the device, in which the first and second portions of the insulator layer are on a same layer and the insulator layer having a surface coplanar with a second surface of each of the first set of local conductive interconnects; a second MOL conductive layer, comprising a second capacitor plate on the insulator layer; a first interconnect coupled to the first capacitor plate; and a second interconnect coupled to the second capacitor plate. |
地址 |
San Diego CA US |