发明名称 METHODOLOGY FOR PATTERN DENSITY OPTIMIZATION
摘要 The present disclosure relates to a method of improving pattern density with a low OPC (optical proximity correction) cycle time, and an associated apparatus. In some embodiments, the method is performed by forming an integrated chip (IC) design that is a graphical representation of an integrated chip. One or more low-pattern-density areas of the IC design are identified having a pattern density that results in a processing failure. The low-pattern-density areas are a subset of the IC design. The pattern density is adjusted within the low-pattern-density area by adding one or more dummy shapes within the low-pattern-density areas. A data preparation process is then performed on the IC design to modify shapes of the one or more dummy shapes within the low-pattern-density areas. By introducing dummy shapes into a local area, rather than into an entire integrated chip design, the demands of the subsequent data preparation process are reduced.
申请公布号 US2015106779(A1) 申请公布日期 2015.04.16
申请号 US201314051549 申请日期 2013.10.11
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Wang Hung-Chun;Chih Ming-Hui;Wu Ping-Chieh;Wu Chun-Hung;Liu Wen-Hao;Huang Cheng-Hsuan;Tsai Cheng-Kun;Huang Wen-Chun;Liu Ru-Gun
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A method for pattern density optimization, comprising: forming an integrated chip (IC) design comprising a graphical representation of an integrated chip using a computation element; performing an initial data preparation process on the IC design, using a data preparation element, to generate a modified IC design having modified shapes of the IC design; identifying one or more low-pattern-density areas of the modified IC design having a pattern density that results in a processing failure after performing the initial data preparation process using a local density checking element, wherein respective low-pattern-density areas comprise a subset of the IC modified design; adjusting the pattern density of the modified IC design within the one or more low-pattern-density areas by adding one or more dummy shapes within the one or more low-pattern-density areas using a dummy shape insertion element; and performing a second data preparation process on the modified IC design that modifies shapes of the one or more dummy shapes within the one or more low-pattern-density areas using the data preparation element.
地址 Hsin-Chu TW