| 摘要 |
<p>A MOSFET manufacturing method and structure. The method comprises: a. providing a substrate (100); b. forming a dummy gate stack layer (200) on the substrate; c. forming source and drain extension regions (101a,101b) on both sides of the dummy gate stack layer; d. forming a diffusion barrier region (105) in the substrate on one side of the drain extension region; e. forming sidewalls (201) on both sides of the dummy gate stack layer, and forming source-drain regions (102) on both sides of the sidewall, and annealing; f. forming an inter-layer dielectric layer (500), and removing the dummy gate stack layer to form a dummy gate vacancy; g. depositing a gate dielectric layer (601), a work function adjustment layer (602) and a gate metal layer (603) sequentially in the dummy gate vacancy. The gate-induce drain leakage (GIDL) current caused by band-to-band tunneling when the device is on off state can be reduced.</p> |
