Performing Processing Operations for Memory Circuits using a Hierarchical Arrangement of Processing Circuits

摘要

The described embodiments include a computing device that comprises at least one memory die having memory circuits and memory die processing circuits, and a logic die coupled to the at least one memory die, the logic die having logic die processing circuits. In the described embodiments, the memory die processing circuits are configured to perform memory die processing operations on data retrieved from or destined for the memory circuits and the logic die processing circuits are configured to perform logic die processing operations on data retrieved from or destined for the memory circuits.

主权项

1. A computing device, comprising:
at least one memory die comprising memory circuits and memory die processing circuits; and a logic die coupled to the at least one memory die, the logic die comprising logic die processing circuits; wherein the memory die processing circuits are configured to perform memory die processing operations on data retrieved from or destined for the memory circuits; and wherein the logic die processing circuits are configured to perform logic die processing operations on data retrieved from or destined for the memory circuits.