发明名称 メモリデータ読み出し回路
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a memory data readout circuit for obtaining a large readout signal. <P>SOLUTION: A memory data readout circuit 1 for reading data stored in a memory cell 10 including at least one resistor element 13 for storage and at least one selection transistor 14 includes means 30 for setting an operating point potential of bit lines (BL1, BL2) for writing or reading data in/from the memory cell 10, means 40 for setting an operating point potential of inputs (D1, D2) of a differential amplifier 20 for amplifying readout data from the memory cell 10, and means 50 for mutually connecting the bit lines and an input of the differential amplifier 20. A large readout signal can be obtained in comparison with the conventional memory data readout circuit. <P>COPYRIGHT: (C)2013,JPO&INPIT</p>
申请公布号 JP5703109(B2) 申请公布日期 2015.04.15
申请号 JP20110096652 申请日期 2011.04.23
申请人 发明人
分类号 G11C11/15 主分类号 G11C11/15
代理机构 代理人
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