| 摘要 |
A wireless communication apparatus using a frequency signal produced by a frequency synthesizer operates at a reduced power consumption and includes a reception portion comprising a first mixer mixing a signal based on the received wireless signal and the frequency signal, a second mixer mixing the first mixer output signal and a local signal, and a demodulation stage demodulating the second mixer output signal. The frequency synthesizer comprises a Voltage Controlled Oscillator (VCO) generating a frequency signal responsive to a variation of a control input voltage, and a feed back circuit receiving as a control input voltage a voltage corresponding to a phase difference between a signal obtained by frequency dividing the output frequency signal of the VCO and a reference clock signal. The VCO is operable at a high frequency that increases with an increase of a bias current. |
