| 发明名称 | Up-conversion mixer having a reduced third order harmonic | ||
| 摘要 | An up-conversion mixer includes a mixer cell having at least one output node configured to generate an output. The up-conversion mixer further includes a first cascaded transconductance input stage coupled to the mixer cell, the first cascaded transconductance input stage configured to receive an input signal and to reduce a third order harmonic of the output. The up-conversion mixer further includes a second cascaded transconductance input stage coupled to the mixer cell, the second cascaded transconductance input stage configured to receive the input signal and to reduce a third order harmonic of the output. | ||
| 申请公布号 | US9007116(B2) | 申请公布日期 | 2015.04.14 |
| 申请号 | US201314062927 | 申请日期 | 2013.10.25 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Chen Huan-Neng;Lu Ying-Ta;Chen Mei-Show;Jou Chewn-Pu |
| 分类号 | G06F7/44;G06G7/16;H03D7/14;H04L27/04 | 主分类号 | G06F7/44 |
| 代理机构 | Lowe Hauptman & Ham, LLP | 代理人 | Lowe Hauptman & Ham, LLP |
| 主权项 | 1. An up-conversion mixer, comprising: a mixer cell having at least one output node configured to generate an output; a first cascaded transconductance input stage coupled to the mixer cell, the first cascaded transconductance input stage configured to receive an input signal and to reduce a third order harmonic of the output; and a second cascaded transconductance input stage coupled to the mixer cell, the second cascaded transconductance input stage configured to receive the input signal and to reduce the third order harmonic of the output, wherein the third order harmonic is reduced to have a first magnitude at a first input signal power level smaller than a second magnitude at a second input signal power level, the second input signal power level being lower than the first input signal power level. | ||
| 地址 | TW | ||