发明名称 Repair control circuit and semiconductor memory device including the same
摘要 A repair control circuit of controlling a repair operation of a semiconductor memory device includes a row matching block and a column matching block. The row matching block stores fail group information indicating one or more fail row groups among a plurality of row groups. The row groups are determined by grouping a plurality of row addresses corresponding to a plurality of wordlines. The row matching block generates a group match signal based on input row address and the fail group information, such that the group match signal indicates the fail row group including the input row address. The column matching block stores fail column addresses of the fail memory cells, and generates a repair control signal based on input column address, the group match signal and the fail column addresses, such that the repair control signal indicates whether the repair operation is executed or not.
申请公布号 US9007856(B2) 申请公布日期 2015.04.14
申请号 US201313804690 申请日期 2013.03.14
申请人 Samsung Electronics Co., Ltd. 发明人 Son Jong-Pil;Kim Jae-Sung;Kang Uk-Song;Sohn Young-Soo
分类号 G11C7/00;G11C29/04;G11C29/44 主分类号 G11C7/00
代理机构 Lee & Morse, P.C. 代理人 Lee & Morse, P.C.
主权项 1. A repair control circuit controlling a repair operation of a semiconductor memory device, the repair control circuit comprising: a row matching block to store fail group information indicating one or more fail row groups among a plurality of row groups, the row groups being determined by grouping a plurality of row addresses corresponding to a plurality of wordlines according to a grouping method, each of the fail row groups including one or more fail row addresses of fail memory cells, the row matching block to generate a group match signal based on an input group address obtained by converting an input row address according to the grouping method and the fail group information, wherein the group match signal indicates the fail row group including the input row address; and a column matching block to store fail column addresses of the fail memory cells, and to generate a repair control signal based on input column address, the group match signal, and the fail column addresses, wherein the repair control signal indicates whether the repair operation is to be executed or not.
地址 Suwon-si, Gyeonggi-do KR