Trench silicide and gate open with local interconnect with replacement gate process

摘要

A semiconductor device fabrication process includes forming insulating mandrels over replacement metal gates on a semiconductor substrate with first gates having sources and drains and at least one second gate being isolated from the first gates. Mandrel spacers are formed around each insulating mandrel. The mandrels and mandrel spacers include the first insulating material. A second insulating layer of the second insulating material is formed over the transistor. One or more first trenches are formed to the sources and drains of the first gates by removing the second insulating material between the insulating mandrels. A second trench is formed to the second gate by removing portions of the first and second insulating materials above the second gate. The first trenches and the second trench are filled with conductive material to form first contacts to the sources and drains of the first gates and a second contact to the second gate.

主权项

1. A semiconductor device comprising:
a transistor comprising a plurality of replacement metal gates on a semiconductor substrate, wherein the transistor comprises first gates and at least one second gate, wherein the first gates have sources and drains and the at least one second gate is isolated from the first gates; gate spacers of a first insulating material around each first gate; a first insulating layer of a second insulating material between the gate spacers, wherein at least some of the second insulating material overlies sources and drains of the first gates; one or more insulating mandrels aligned over the first gates and the at least one second gate, wherein the insulating mandrels comprise the first insulating material; mandrel spacers around each insulating mandrel, wherein the mandrel spacers comprise the first insulating material; one or more first contacts to the sources and drains of the first gates through the first insulating layer between the mandrel spacers; a second contact to the at least one second gate through the first insulating material above the second gate; a third insulating layer over the transistor; and one or more local interconnects that contact the first contacts and the second contact through the third insulating layer.