发明名称 | High-voltage MEMS apparatus and method | ||
摘要 | A high-voltage MEMS system compatible with low-voltage semiconductor process technology is disclosed. The system comprises a MEMS device coupled to a high-voltage bias generator employing an extended-voltage isolation residing in a semiconductor technology substrate. The system avoids the use of high-voltage transistors so that special high-voltage processing steps are not required of the semiconductor technology, thereby reducing process cost and complexity. MEMS testing capability is addressed with a self-test circuit allowing modulation of the bias voltage and current so that a need for external high-voltage connections and associated electro-static discharge protection circuitry are also avoided. | ||
申请公布号 | US9006832(B2) | 申请公布日期 | 2015.04.14 |
申请号 | US201113071374 | 申请日期 | 2011.03.24 |
申请人 | Invensense, Inc. | 发明人 | Shaeffer Derek;Cagdaser Baris;Seeger Joseph |
分类号 | H01L23/62;H01L21/00;H01L27/092;H01L21/8238;B81B7/00 | 主分类号 | H01L23/62 |
代理机构 | Sawyer Law Group, P.C. | 代理人 | Sawyer Law Group, P.C. |
主权项 | 1. A MEMS system comprising: a MEMS device comprising a high-voltage port; and a CMOS device comprising: a semiconductor technology substrate, an extended-voltage isolation region, and a high-voltage bias generator,wherein, the extended-voltage isolation region comprises a native region separating an N-type well region from a P-type well region, thereby extending a breakdown voltage between the N-type and P-type well regions, wherein, the high-voltage bias generator is coupled to the extended-voltage isolation region, the extended-voltage isolation region resides in the semiconductor substrate such that one of the N-type and P-type well regions is in contact with the semiconductor substrate, and the high-voltage bias generator is further coupled to the high-voltage port. | ||
地址 | San Jose CA US |