发明名称 Information processing apparatus and interrupt control method
摘要 A memory stores therein a program status word containing an address of data that is to be read when an interrupt process is executed. a processor determines whether or not the program status word stored in the memory is available, controls the memory to stores a determination result in the memory in association with the program status word, acquires the program status word and the determination result from the memory when the interrupt process occurs, and reads data on the basis of the address contained in the acquired program status word when the acquired determination result indicates that the program status word is available.
申请公布号 US9009422(B2) 申请公布日期 2015.04.14
申请号 US201113196965 申请日期 2011.08.03
申请人 Fujitsu Limited 发明人 Takeishi Naoto;Watanabe Kazuyoshi
分类号 G06F12/16;G06F9/30;G06F9/32 主分类号 G06F12/16
代理机构 Fujitsu Patent Center 代理人 Fujitsu Patent Center
主权项 1. An information processing apparatus comprising: a first memory area configured to store therein a first program status word containing an address of data that is to be read when an interrupt process is executed; a second memory area configured to store a second program status word; and a processor configured to determine whether or not the first program status word stored in the first memory area is available in advance of an execution of the interrupt process, to store a determination result in association with the first program status word in the first memory area, to acquire the first program status word and the determination result from the first memory area when the interrupt process occurs, to execute the interrupt process by using the address contained in the acquired first program status word when the acquired determination result indicates that the first program status word is available, and to resume a process that has been interrupted due to the occurrence of the interrupt process by using an instruction address contained in the second program status word.
地址 Kawasaki JP
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