Error correction and recovery in chained memory architectures

摘要

Electronic apparatus, systems, and methods to construct and operate the electronic apparatus and/or systems include a memory unit configured to receive data flow from two directions. The memory unit can be configured serially in a chain with other memory units. The chain can include an error check and correcting unit (ECC). Additional apparatus, systems, and methods are disclosed.

主权项

1. A memory unit comprising:
a memory section having a plurality of memory devices arranged as a vertical stack of individual memory chips; and an interface section coupled to the memory section, the interface section structured to couple into a chain exterior to the memory unit, and further structured to allow access to the memory section in response to a request to access the memory section received from either of two directions in the chain.