Memory device having multiple dielectric gate stacks and related methods

摘要

A memory device may include a semiconductor substrate, and a memory transistor in the semiconductor substrate. The memory transistor may include source and drain regions in the semiconductor substrate and a channel region therebetween, and a gate stack. The gate stack may include a first dielectric layer over the channel region, a first diffusion barrier layer over the first dielectric layer, a first electrically conductive layer over the first diffusion barrier layer, a second dielectric layer over the first electrically conductive layer, a second diffusion barrier layer over the second dielectric layer, and a second electrically conductive layer over the second diffusion barrier layer. The first and second dielectric layers may include different dielectric materials, and the first diffusion barrier layer may be thinner than the second diffusion barrier layer.

主权项

1. A memory device comprising:
a semiconductor substrate; and at least one memory transistor in said semiconductor substrate and comprising
source and drain regions in said semiconductor substrate and a channel region therebetween, anda gate stack comprising a first dielectric layer over said channel region, a first diffusion barrier layer over said first dielectric layer, a first electrically conductive layer over said first diffusion barrier layer, a second dielectric layer over said first electrically conductive layer, a second diffusion barrier layer over said second dielectric layer, and a second electrically conductive layer over said second diffusion barrier layer;said first and second dielectric layers comprising different dielectric materials, and said first diffusion barrier layer being thinner than said second diffusion barrier layer.