Non-volatile semiconductor memory device

摘要

In performing a read operation of a memory transistor, a control circuit supplies a first voltage to a selected word line connected to a selected memory transistor. A second voltage is supplied to a non-selected word line connected to a non-selected memory transistor other than the selected memory transistor, the second voltage being higher than the first voltage. A third voltage is supplied to a bit line. A fourth voltage lower than the third voltage is supplied to, among source lines, a selected source line connected to a memory string including the selected memory transistor in a selected memory block. A fifth voltage substantially the same as the third voltage is supplied to, among the source lines, a non-selected source line connected to a non-selected memory string in the selected memory block.

主权项

1. A non-volatile semiconductor memory device comprising:
a memory cell array including a plurality of memory cells, the memory cells including a first memory cell and a second memory cell; a plurality of bit lines electrically coupled to the memory cells; a first source line electrically coupled to the first memory cell; a second source line electrically coupled to the second memory cell; a driver including a first unit, the first unit including a first differential amplifier, a first transistor, a second transistor, and a third transistor, a first terminal of the first differential amplifier being electrically coupled to the second transistor and the third transistor, a second terminal of the first differential amplifier being electrically coupled to the first source line, and an output terminal of the first differential amplifier being electrically coupled to a gate of the first transistor; a first line electrically coupled to the second transistor; and a second line electrically coupled to the third transistor.