DRAM with a nanowire access transistor

摘要

A semiconductor nanowire is formed integrally with a wraparound semiconductor portion that contacts sidewalls of a conductive cap structure located at an upper portion of a deep trench and contacting an inner electrode of a deep trench capacitor. The semiconductor nanowire is suspended from above a buried insulator layer. A gate dielectric layer is formed on the surfaces of the patterned semiconductor material structure including the semiconductor nanowire and the wraparound semiconductor portion. A wraparound gate electrode portion is formed around a center portion of the semiconductor nanowire and gate spacers are formed. Physically exposed portions of the patterned semiconductor material structure are removed, and selective epitaxy and metallization are performed to connect a source-side end of the semiconductor nanowire to the conductive cap structure.

主权项

1. A semiconductor structure comprising:
a trench capacitor embedded in a substrate and comprising an inner electrode, a node dielectric, and an outer electrode; a conductive strap structure in contact with, and overlying, said inner electrode; a semiconductor nanowire overlying an insulator layer in said substrate; a source region contacting one end of said semiconductor nanowire; and a source-side metal semiconductor alloy portion contacting said source region, said source-side metal semiconductor alloy portion including a sub-portion that underlies said source region and physically contacts said conductive strap structure, wherein said semiconductor nanowire is vertically spaced from a planar top surface of said insulator layer, and a lengthwise direction of the semiconductor nanowire is parallel to said planar top surface of said insulator layer, and wherein said planar top surface of said insulator layer is adjoined to a curved top surface of said insulator layer that is adjoined to said conductive strap structure.