| 摘要 |
PROBLEM TO BE SOLVED: To prevent jitter from increasing and reduce phase noise.SOLUTION: A PLL circuit includes: a voltage-controlled oscillator 1 for outputting an oscillation signal with a frequency depending on an input voltage; a frequency divider 2 for frequency-dividing the oscillation signal to output a frequency-divided signal; a phase comparator 3 for comparing a phase of the frequency-divided signal and a phase of an external input signal and outputting a first phase comparison signal and a second phase comparison signal different in polarity from each other; a differential amplification circuit 4 for outputting a control voltage based on a voltage difference between the first phase comparison signal and the second phase comparison signal to the voltage-controlled oscillator 1; a level shift circuit 7 for shifting a DC level of the second phase comparison signal to output a level-shifted signal; and an amplification circuit 8 for amplifying the level-shifted signal to output an amplified signal. The differential amplification circuit 4 generates the control voltage on the basis of a voltage difference between the amplified signal and the first phase comparison signal. |
