SCHEDULING PROGRAM INSTRUCTIONS WITH A RUNNER-UP EXECUTION POSITION

摘要

A single instruction multiple thread (SIMT) processor 2 includes scheduling circuitry 8 for calculating a next scheduled execution point for execution circuits 4 which execute respective threads corresponding to a common program. In addition to calculating the next scheduled execution point, the scheduling circuitry determines a runner up execution point which would have been determined as the next scheduled execution point if the threads which actually correspond to the next scheduled execution point had been removed from consideration. This runner up execution point is used to identify points of re-convergence within the program flow and as part of the operation of a static branch predictor 10.

主权项

1. Apparatus for processing data comprising:
a plurality of execution circuits configured to execute a common program as a respective plurality of threads of program execution; and scheduling circuitry configured to determine a next scheduled execution position within said common program corresponding to a next program instruction to be executed by at least one of said plurality of execution circuits while any of said plurality of execution circuits at a current execution position in their path through said common program not followed by said next scheduled position do not execute said next program instruction; wherein said scheduling circuitry is configured also to calculate a runner up execution position that would have been determined as said next scheduled execution position if said next program instruction was excluded from serving as said next scheduled execution position