| 摘要 |
In described examples, a semiconductor device (100) has a vertical drain extended MOS transistor (110) with deep trench structures (104) to define a vertical drift region (108) and at least one vertical drain contact region (106), separated from the vertical drift region (108) by at least one instance of the deep trench structures (104). Dopants are implanted into the vertical drain contact regions (106), and the semiconductor device (100) is annealed, so that the implanted dopants diffuse proximate to a bottom of the deep trench structures (104). The vertical drain contact regions (106) make electrical contact to the proximate vertical drift region (108) at the bottom of the intervening deep trench structure (104). At least one gate (114), body region (118) and source region (120) are formed above the drift region (108) at, or proximate to, a top surface of a substrate (102) of the semiconductor device (100). The deep trench structures (104) are spaced to form RESURF regions for the drift region (108). |
