发明名称 METHOD FOR MANUFACTURING THREE-DIMENSIONAL STRUCTURE INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To prevent a MOS transistor from being damaged due to a BOX layer polished when a support substrate is removed, in manufacturing a three-dimensional structure integrated circuit.SOLUTION: A second layer substrate of an SOI structure is laminated on a first layer substrate in a face down manner to be bonded. Then, a support substrate of the second layer substrate is peeled by removing the support substrate by selective etching or by removing a buried insulating layer of an SOI substrate by selective etching. After the peeling of the support substrate, an active layer of the second layer substrate is etched to separate each of element regions, and then an insulating film is formed entirely to form necessary electrodes and wirings.</p>
申请公布号 JP2015065281(A) 申请公布日期 2015.04.09
申请号 JP20130198147 申请日期 2013.09.25
申请人 NIPPON HOSO KYOKAI <NHK> 发明人 IGUCHI YOSHINORI
分类号 H01L27/00;H01L21/02;H01L21/336;H01L21/768;H01L21/8234;H01L27/088;H01L27/12;H01L29/786 主分类号 H01L27/00
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