发明名称 SIGNAL OUTPUT CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To enable switching between a PECL output and an LVDS output with a small number of components, and to output an output signal having a satisfactory characteristic.SOLUTION: A signal output circuit includes: a first transistor 11; a second transistor 12; a first output terminal 55; a second output terminal 56; a first resistor 21 disposed between the first transistor 11 and the first output terminal 55; a second resistor 22 disposed between the second transistor 12 and the second output terminal 56; a first switch 31 for switching whether or not to make short-circuit between the first transistor 11 and the first output terminal 55; a second switch 32 for switching whether or not to make short-circuit between the second transistor 12 and the second output terminal 56; and a switching unit 60 for switching whether or not to lead a current, input from the first output terminal 55 or the second output terminal 56, to the ground, in cooperation with whether or not the short-circuit is made between the first transistor 11 and the first output terminal 55 and the short-circuit is made between the second transistor 12 and the second output terminal 56.</p>
申请公布号 JP2015065558(A) 申请公布日期 2015.04.09
申请号 JP20130197922 申请日期 2013.09.25
申请人 NIPPON DEMPA KOGYO CO LTD 发明人 SHINOZUKA TOSHIYUKI
分类号 H03K19/0175 主分类号 H03K19/0175
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