TRENCH FORMATION WITH CD LESS THAN 10 NM FOR REPLACEMENT FIN GROWTH

摘要

Embodiments described herein generally relate to methods of forming sub-10 nm node FinFETs. Various processing steps may be performed on a substrate to provide a trench over which a dielectric layer is conformally deposited. The dielectric layer is subsequently etched within the trench to expose the underlying substrate and a semiconductive material is deposited in the trench to form a fin structure. The processes of forming the trench, depositing the dielectric layer, and forming the fin structure can achieve sub-10 nm node dimensions and provide increasingly smaller FinFETs.

主权项

1. A method of forming a semiconducting fin structure, comprising:
etching a silicon layer to form a feature bounded by an insulator material; conformally depositing a dielectric layer over the insulator material and the feature formed in the silicon layer; etching the dielectric layer to expose a portion of the silicon layer within the feature through the dielectric layer; forming a semiconducting material on the exposed portion of the silicon layer, the semiconducting material filling the feature between the dielectric layer; and removing a portion of the dielectric layer, the insulator material and the semiconducting material to form a planar surface.