发明名称 CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME
摘要 A chip package includes a packaging substrate, a semiconductor chip, and a plurality of conductive structures. The semiconductor chip has a central region and an edge region that surrounds the central region. The conductive structures are between the packaging substrate and the semiconductor chip. The conductive structures have different heights, and the heights of the conductive structures are gradually increased from the central region of the semiconductor chip to the edge region of the semiconductor chip, such that a distance between the edge region of the semiconductor chip and the packaging substrate is greater than a distance between the central region of the semiconductor chip and the packaging substrate.
申请公布号 US2015097286(A1) 申请公布日期 2015.04.09
申请号 US201414568056 申请日期 2014.12.11
申请人 XINTEC INC. 发明人 SUEN Wei-Luen;LIN Chia-Sheng;HO Yen-Shih;LIU Tsang-Yu
分类号 H01L23/00 主分类号 H01L23/00
代理机构 代理人
主权项 1. A chip package, comprising: a packaging substrate; a semiconductor chip having a central region and an edge region that surrounds the central region; and a plurality of conductive structures between the packaging substrate and the semiconductor chip, wherein the conductive structures have different heights, and the heights of the conductive structures are gradually increased from the central region of the semiconductor chip to the edge region of the semiconductor chip, such that a distance between the edge region of the semiconductor chip and the packaging substrate is greater than a distance between the central region of the semiconductor chip and the packaging substrate.
地址 Zhongli City TW