发明名称 |
HART CHANNEL INTERFACE COMPONENT INCLUDING REDUNDANCY |
摘要 |
A channel interface component including redundancy within a control system with highway addressable remote transfer (HART) channels is provided. In one embodiment, a circuit includes: at least two highway addressable remote transfer (HART) channels, each HART channel including an input terminal and an output terminal configured to connect with a HART device via a current loop; an channel interface component coupled to each HART channel that is configured to support HART protocol signals for communications with the HART device, wherein the channel interface component includes a suicide relay switch for connecting or disconnecting each HART channel from the HART device; and a programmable logic device coupled to the channel interface component that is configured to perform modulation and demodulation of HART protocol signals for communications with the HART device. |
申请公布号 |
US2015100137(A1) |
申请公布日期 |
2015.04.09 |
申请号 |
US201414571825 |
申请日期 |
2014.12.16 |
申请人 |
General Electric Company |
发明人 |
Alley Daniel Milton;Henderson Bruce Cameron;Shen Longhui |
分类号 |
G05B9/03 |
主分类号 |
G05B9/03 |
代理机构 |
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代理人 |
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主权项 |
1. A circuit for providing redundant highway addressable remote transfer (HART) channels, comprising:
a redundant pair of channel interface components, each having an input terminal and an output terminal configured to connect with a common HART device, wherein each channel interface component includes circuitry for implementing a current loop with the common HART device to operate in a range of approximately four to twenty milliamperes; and a programmable logic device coupled to a suicide relay switch in each channel interface component for alternatively activating and deactivating the redundant pair of channel interface components by connecting and disconnecting respective current loops to provide a master channel and a slave channel, wherein the programmable logic device is programmable to operate the redundant pair of channel interface components in either a sensing mode or an actuator mode; wherein each channel interface component includes:
a loop voltage supply for powering the current loop, wherein the loop voltage is controlled by a digital signal from the programmable logic device that is passed through a digital-to-analog converter (DAC);a voltage modulator and a current regulator arranged in series with a ground, wherein the voltage modulator provides modulated pulses onto the current loop while operating in the sensing mode, and the current regulator provides a current specified from the programmable logic device onto the current loop while operating in the actuator mode; andan isolation barrier that isolates the channel interface component from both a paired channel interface component and from the programmable logic device. |
地址 |
Schenectady NY US |