发明名称 半導体装置
摘要 <p>Provided is a non-punch-through (NPT) IGBT (10) in which a rear surface structure including a p + collector layer (8) and a collector electrode (9) is provided on a rear surface of an n- semiconductor substrate and a depletion layer which is spread from a pn junction between a p base region (2) and an n - drift layer (1) when the NPT-IGBT is turned off does not come into contact with the p + collector layer (8). In the NPT-IGBT (10), a difference between the hole current carrier concentration of a region of the n- drift layer (1) which is provided at a depth of, for example, 0.3 µm or less from a pn junction (first pn junction) (11) between the p + collector layer (8) and the n - drift layer (1) and the stored carrier concentration of a region of the n- drift layer (1) which is provided at a depth of, for example, 15 µm from the pn junction (11) between the p + collector layer (8) and the n- drift layer (1) when the NPT-IGBT is turned off is in the range of about 30% to 70%. Therefore, it is possible to achieve a high-speed and low-loss switching operation with a low cost.</p>
申请公布号 JP5696815(B2) 申请公布日期 2015.04.08
申请号 JP20140518320 申请日期 2013.04.03
申请人 发明人
分类号 H01L29/78;H01L29/739 主分类号 H01L29/78
代理机构 代理人
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