发明名称 Database system with data organization providing improved bit parallel processing
摘要 A database system provides vertical or horizontal pre-packing of database data elements according to a size of physical processor words in order to obtain improved parallel processing at the bit level. After processor words are populated with data from multiple data elements of the database, query operations are used which may simultaneously process the multiple data elements in each data word simultaneously in the computer arithmetic logic unit.
申请公布号 US9002903(B2) 申请公布日期 2015.04.07
申请号 US201313840249 申请日期 2013.03.15
申请人 Wisconsin Alumni Research Foundation 发明人 Li Yinan;Patel Jignesh M.
分类号 G06F17/30 主分类号 G06F17/30
代理机构 Boyle Fredrickson, S.C. 代理人 Boyle Fredrickson, S.C.
主权项 1. A database system comprising: a data storage device for holding database data elements; a processor in communication with the data storage device, the processor executing a stored program held in a non-transient medium to: (a) receive input indicating a projected type of database activity to be conducted on the database elements: (b) based on the received input, read the database data elements from a first memory structure in memory and reorganize the database data elements in a second memory structure in memory in a selected one of a horizontal bit parallel structure and vertical bit parallel structure as determined from the received input; wherein the horizontal bit parallel structure provides multiple logical rows and columns and organizes multiple data elements in each logical row, where the logical row may be receivable in its entirety by an arithmetic logic unit of the processor for execution by the arithmetic logic unit of bits of the multiple data elements in parallel; and wherein the vertical bit parallel structure provides multiple logical rows and columns and organizes multiple data elements in multiple logical columns so that bits only of a single order of the organized data elements are in each logical row, where the logical row may be receivable in its entirety by an arithmetic logic unit of the processor for execution by the arithmetic logic unit of all of the bits of the single order of the multiple data elements in parallel; and (c) execute queries on multiple data elements in parallel by bit-parallel processing of the multiple logical rows of data using the arithmetic logic unit.
地址 Madison WI US