发明名称 |
System and method of eliminating on-board calibration resistor for on-die termination |
摘要 |
A system for calibrating impedance of an input/output (I/O) buffer on a semiconductor die includes: the I/O buffer; a temperature sensor on the semiconductor die; and a supply sensor on the semiconductor die. The temperature sensor is configured to acquire temperature information for calibrating the I/O buffer. The supply sensor is configured to acquire voltage information for calibrating the I/O buffer. The I/O buffer comprises: a memory component coupled to the temperature and supply sensors and configured to store the acquired temperature or voltage information; a logic component coupled to the memory component; and a driver with driver legs. The driver is coupled to the logic component. The logic component is configured to generate driver control signals representing an on/off configuration for the driver legs of the driver based at least in part on the acquired temperature information or the acquired voltage information stored in the memory component. |
申请公布号 |
US9000800(B1) |
申请公布日期 |
2015.04.07 |
申请号 |
US201213621655 |
申请日期 |
2012.09.17 |
申请人 |
Xilinx, Inc. |
发明人 |
Cical Ionut C.;Cullen Edward;Bogue Ivan |
分类号 |
H03K17/16;H03K19/00;H03K19/003;H04L25/02 |
主分类号 |
H03K17/16 |
代理机构 |
|
代理人 |
Chan Gerald |
主权项 |
1. A system for calibrating impedance of an input/output (I/O) buffer on a semiconductor die, comprising:
the I/O buffer on the semiconductor die; a temperature sensor on the semiconductor die, wherein the temperature sensor is configured to acquire temperature information for calibrating the I/O buffer; a supply sensor on the semiconductor die, wherein the supply sensor is configured to acquire voltage information for calibrating the I/O buffer; wherein the I/O buffer comprises:
a memory component coupled to the temperature sensor and the supply sensor, the memory component configured to store the acquired temperature information or the acquired voltage information;a logic component coupled to the memory component; anda driver with driver legs, wherein the driver is coupled to the logic component;wherein the logic component is configured to generate driver control signals representing an on/off configuration for the driver legs of the driver of the I/O buffer based at least in part on the acquired temperature information or the acquired voltage information stored in the memory component. |
地址 |
San Jose CA US |