Memory methods and systems with adiabatic switching

摘要

A memory system includes wordlines and pairs of complementary bitlines that provide access to memory storage elements. Capacitive and resistive loads associated with wordlines and bitlines are driven relatively slowly between voltage levels to reduce peak current, and thus power dissipation. Power dissipation is further reduced by charging complementary bitlines at substantially different rates.

主权项

1. A memory comprising:
a voltage generator to provide a varying supply voltage; and a memory core having storage cells and sense amplifiers, each sense amplifier having an N-sense supply node to receive a constant supply voltage, and a P-sense supply node coupled to the voltage generator to receive the varying supply voltage; a memory interface coupled to the memory core to issue memory-control signals; and timing-control circuitry coupled to the memory interface and the voltage generator, the timing-control circuitry to synchronize the varying supply voltage with the memory-control signals.